Normally signals flip from one logic state to another.
The time it takes the signal to move between states is the
transition time 
, where the time is measured between 10% and
90% of the signal levels.
Delays within the logic elements result in a propagation (pulse)
delay 
, where the time is measured between 50% of the input
signal and 50% of the output response.
Definitions of the transition time and propagation delay are shown in
figure 7.5.
Figure 7.5: The transition time of the input and output
signals, and the propagation delay through a gate.